In a simple matrix-type liquid crystal display commonly used for flat panel display devices, the display data from a microprocessor unit (MPU) is typically transferred to the LCD module (the liquid crystal display panel (LCD panel)), the scan electrode drive circuit (Y driver), and the signal electrode drive circuit (X driver) using one of two basic methods: using a matrix-type liquid crystal display element module controller (simply "module controller" below), or using an X driver embedded in RAM.
The module controller method is described first. As with a CRT display apparatus, the module controller connected to the system bus reads the display data from video RAM (VRAM), and sends the data to the LCD module at a high frequency to refresh the display.
In the latter method, a dual port frame memory (built-in RAM) is provided in the X driver. This frame memory is directly accessed by the MPU via the data bus, control bus, or address bus irrespective of the LCD timing to generate the required control signal in the X driver by changing the display data in the frame memory. One scan line equivalent of display data is simultaneously read from the built-in frame memory to refresh the display.
With the module controller method above, VRAM data access and transfer coordinated with the LCD timing must be executed each time the display screen is changed, and it is therefore necessary for the VRAM, module controller, and LCD driver to constantly operate at a high frequency. In addition, the display refresh operation involves operation of the VRAM, module controller, and LCD driver. Operation of an LSI device at a high frequency clock results in through-current flowing to the plural CMOS devices used as circuit elements, increasing the total current consumption. Total current consumption also increases in direct proportion to the size of the LCD panel. In addition, while the VRAM is accessed by both the MPU and the module controller, a high speed clock must be used so that MPU access during the display refresh operation does not collide with module controller access, thus limiting the use of a low frequency operating module controller and limiting the processing ability of the MPU.
Operation at a low frequency clock is possible in the latter method above because there is no relationship between display data transfer and LCD timing. This method thus requires 10-100 times less power than the module controller method. When using a large liquid crystal panel, however, the number of X drivers must be increased.
The number of X driver output terminals is generally a multiple of ten (e.g., 160 pins) and not a power of two (e.g., 2.sup.n), however, because each RAM device built into the X drivers has an independent address area. When the internal memory of plural X drivers is addressed by the MPU, the MPU finds apparent gaps in the total memory area, and it is usually difficult to maintain a continuous sequence of addresses. As a result, the address coordination process of the MPU must be executed at high speed when the entire display area is changed at one time as during scrolling or panning operations, significantly increasing the processing load on the MPU.
It is, of course, possible to design the X driver ICs to have an exponent-of-two number of output pins, but this would seriously impair system interchangeability because compatibility with the number of electrodes in existing LCD panels would be lost. In addition, use of plural X drivers necessarily increases the number of chip selection buses, and sufficient space for this plural number of X drivers to be installed around the LCD panel must be provided. This reduces the display area ratio of the display panel, and inhibits the potential size reduction of the LCD module. The latter method above is therefore unsuited to large scale liquid crystal panels.
Matrix liquid crystal displays such as, twisted nematic (TN) and super twisted nematic (STN), are known in the art. Reference is made to FIGS. 21A-21E and FIG. 22 in which a conventional matrix liquid crystal display is provided. A liquid crystal panel generally indicated as 1 is composed of a liquid crystal layer 5, a first substrate 2 and a second substrate 3 for sandwiching the liquid crystal layer 5 therebetween. A group of column electrodes Y.sub.1 -Y.sub.m are oriented on substrate 2 in the vertical direction and a plurality of row electrodes X.sub.1 -X.sub.n are formed on substrate 3 in substantially the horizontal direction to form a matrix. Each intersection of column electrodes Y.sub.1 -Y.sub.m and row electrodes X.sub.1 -X.sub.n forms a display element or pixel 7. Display pixels 7 having the open circle indicate an ON state and those pixels having a blank indicate an OFF state.
A conventional multiplex driving based on the amplitude selective addressing scheme is known to one of ordinary skill in the art as one method of driving the liquid crystal cells mentioned above. In such a method, a selected voltage or non-selected voltage is sequentially applied to each of row electrodes X.sub.1 -X.sub.n individually. That is, a selection voltage is applied to only one row electrode at a time. In the conventional driving method, the time period required to apply the successive selected or non-selected voltage to all the row electrodes X.sub.1 -X.sub.n is as one frame period, indicated in FIGS. 21A-21E as time period F. Typically the frame period is approximate 1/60th of a second or 16.66 milliseconds.
Simultaneously to the successive application of the selected voltage or the non-selected voltage to each of the row electrodes X.sub.1 -X.sub.n, a data signal representing an ON or OFF voltage is applied to column electrodes Y.sub.1 -Y.sub.m. Accordingly to turn on a pixel 7, the area in which the row electrode intersects the column electrode, to the ON state, an ON voltage is applied to a desired column electrode when the row electrode is selected.
Referring specifically to FIGS. 21A-21E, a conventional multiplex drive method of a simple matrix type liquid crystal and more specifically the amplitude selective addressing scheme is shown therein. FIGS. 21A-21C show the row selection voltage waveforms that is applied in sequence to row electrodes X.sub.1, X.sub.2 . . . X.sub.n, respectively. More particularly, in time period t.sub.1, a voltage pulse having a magnitude of V.sub.1 is applied to row electrode X.sub.1, and a voltage of zero is applied to electrodes X.sub.2 -X.sub.n ; in time period t.sub.2, a voltage pulse having a magnitude of V.sub.1 is applied to row electrode X.sub.2 and a voltage of zero is applied to electrodes X.sub.1 and X.sub.3 -X.sub.n ; and in time period t.sub.n, V.sub.1 is applied to row electrode X.sub.n and a voltage of zero is to electrodes X.sub.1 -X.sub.n-1. In other words, a voltage pulse having a magnitude of V.sub.1 is applied to only one row electrode X.sub.i in time t.sub.i. Typically, t.sub.i is approximately 69 .mu. seconds and V.sub.1 is approximately 25 volts. As will be apparent to one who has read this description, all of the row electrodes are sequentially selected in time periods t.sub.1 -t.sub.n or one frame period F.
FIG. 21D shows the waveform applied to column electrode Y.sub.1, and FIG. 21E shows the synthesized voltage waveform applied to the pixel 7.sub.1,1 formed at the intersection of the column electrode Y.sub.1 and the row electrode X.sub.1. As shown therein, during time period t.sub.1, a voltage pulse having a magnitude of V.sub.1 is applied to row X.sub.1 and a voltage pulse of -V.sub.2 is applied to column electrode Y.sub.1. Typically, V.sub.2 is approximately 1.6 volts. The resultant voltage at pixel 7.sub.1,1 is -(V.sub.1 -V.sub.2). This synthesized voltage is sufficient to turn pixel 7.sub.1,1 to its ON state.
One known problem with this method is that in order to select and drive the one line of the row electrodes, a relatively high voltage is required to provide good display characteristics, such as, contrast and low distortion. These conventional displays, requiring such a high voltage, also consume relatively more energy. When such displays are used in portable devices, they are supplied with electrical energy by, for example, batteries. As a result of the higher energy consumption, the portable devices have relatively shorter times of operation before the batteries require replacement and/or recharging.
Various attempts have been made to overcome this problem. For example, it has been suggested in "A Generalized Addressing Technique for RMS Responding Matrix LCDs," 1988 International Display Research Conference, pp. 80-85. to simultaneously applying a row selection voltage to more than one row electrode.
As shown in FIGS. 23A-23D, a conventional method for driving a liquid crystal display by simultaneously selecting a group of more than one row electrode is shown. As shown therein, the n row electrodes are divided in j groups of row electrodes, each group comprising, for example, two row electrodes. In this example, row electrodes X.sub.1, X.sub.2 ; X.sub.3, X.sub.4 ; and X.sub.n-1, X.sub.n, each form a group of row electrodes.
Referring again to FIG. 23A, that figure illustrates row selection voltage waveforms applied simultaneously to both row electrodes X.sub.1 and X.sub.2 in time periods t.sub.1 and t.sub.2 and a voltage of zero is applied to row electrodes X.sub.1 and X.sub.2 in the remaining time periods of frame period F. Similarly, FIG. 23B indicates the row selection voltage waveforms applied to row electrodes X.sub.3 and X.sub.4, during time periods t.sub.3 and t.sub.4 and a voltage of zero is applied to row electrodes X.sub.3 and X.sub.4 in the other time periods of frame period F. FIG. 23C illustrates the voltage waveform applied to column electrode Y.sub.1, and FIG. 23D indicates the synthesized voltage waveform applied to the pixel 7.sub.1,1. Generally, t.sub.1, t.sub.2, . . . t.sub.n =69 .mu. seconds, V.sub.1 is approximately 17.6 volts and V.sub.2 is approximately 2.3 volts.
As shown in the example of FIGS. 23A-23D, every two row electrodes are selected in sequence. In the first selection sequence, two row electrodes, X.sub.1 and X.sub.2, are selected and row selection voltage waveforms such as that shown in FIG. 23A are applied to each row electrode. At the same time, the designated column voltage, which is described below, is applied to each column electrode, Y.sub.1 to Y.sub.m. Next, row electrodes X.sub.3 and X.sub.4 are simultaneously selected with substantially the same type of waveform voltages as that described above. At the same time, the column voltages Y.sub.1 to Y.sub.m are applied to each column electrode. One frame period represents the selection of all row electrodes, X.sub.1 to X.sub.n. In other words, a complete image is displayed during one frame.
As will be explained hereinbelow, when h row electrodes are simultaneously selected, the voltage waveforms that apply the row electrodes described above use 2.sup.h row-select patterns. In the example illustrated in FIGS. 23A-23D, the number of row electrodes simultaneously selected is two, thus the number of row select patterns is 2.sup.2 or 4.
Moreover, the column voltages applied to each column electrode Y.sub.1 to Y.sub.m provide the same number of pulse patterns as that of the row select pulse patterns. That is, there are 2.sup.h pulse patterns. These pulse patterns are determined by comparing the states of pixels on the simultaneously selected row electrodes i.e., whether the pixels are ON or OFF, with the polarities of the voltage pulses applied to row electrode.
In this example, as shown in the previously described FIGS. 23A-23D when row electrodes X.sub.1 and X.sub.2 are selected and row voltages such as those in FIG. 23A and FIG. 24A are applied thereto and when the pixels on row electrodes X.sub.1 and X.sub.2 are ON and OFF, respectively, the voltage waveform applied the column electrode is voltage waveform Y.sub.a shown in FIG. 24B. When the pixels are OFF and ON, respectively, the column voltage waveform Y.sub.b is applied to the column electrode. In another example, when the pixels are both ON, a voltage waveform Y.sub.c is applied to the column electrode. Finally, when both pixels are OFF, the a column voltage waveform Y.sub.d is applied to the column electrode.
The above-mentioned column voltage waveforms Y.sub.a -Y.sub.d are determined as follows. At first, each pixel simultaneously selected is defined to have a first value of 1 when the voltage applied by the row electrode to the corresponding selected pixel is positive or a first value of -1 when the row electrode is negative. Each of the selected pixels is defined to have a second value of -1 when the display state is ON or a second value of 1 when display state is OFF. The first value is compared to the second value bit-by-bit, the difference between the number of matches, i.e., when the first value equals the second value, and the number of mismatches, i.e., when the first value does not equal the second value, is calculated. When the difference between the number of matches and mismatches for the simultaneously selected rows is two, V.sub.2 is applied; when 0, V.sub.0 is applied; and when -2, -V.sub.2 is applied.
For example, when the pulse waveforms shown in FIG. 23A are applied to row electrodes X.sub.1 and X.sub.2, a column voltage having the waveform of Y.sub.a is applied. This column voltage is determined as follows. The pixels formed at the intersections of column electrode Y.sub.1 and rows electrodes X.sub.1 and X.sub.2 are in the ON and OFF states, respectively. For the purposes of this discussion, these pixels will be referred to as the first and second pixels, respectively. In other words, the first pixel has a second value of -1 and the second pixel has a second value of 1. During the period t.sub.a, the first pixel has a first value of -1 and the second pixel has a first value of -1, since the row voltages X.sub.1 and X.sub.2 are both -V.sub.1. Referring to the first pixel, since the first value is -1 and the second value is -1, there is a match. With regard to the second pixel, the first value is -1 and the second value is 1, thereby forming a mismatch. The difference between the number of mismatches and matches is 1--1 or zero. Therefore, a voltage of 0 (zero) is applied to the column electrode in time t.sub.a. Next, concerning the pulse waveforms of the time interval t.sub.b, the applied voltage of row electrode X.sub.1 is positive and the applied voltage of row electrode pulse X.sub.2 is negative. Using a similar analysis as described above, the number of matches is zero and the number of mismatches is 2. Thus, -V.sub.2 volts will be applied to the second half of time interval t.sub.1.
As should now be apparent, the first values in time interval t.sub.c in FIG. 23A are -1 and1 because the applied voltage of row electrode X.sub.1 is negative and the applied voltage of row electrode X.sub.2 is positive. When these are compared with the second values of the first and second pixels of -1 and 1, the number of matches is two and the number of mismatches is zero. The difference between the number of matches and the number of mismatches is 2. Thus, the column voltage of V.sub.2 volts will be applied in time interval t.sub.c.
In time interval t.sub.d, the applied voltage of row electrodes X.sub.1 and X.sub.2 are both positive. Thus, the first values are 1 and 1. When compared to the pixel states of -1 and 1, the number of matches is 1 and the number of mismatches is 1, thus the difference between the number of matches and the number of mismatches is zero. Accordingly, zero volts will be applied to Y.sub.a for the time interval t.sub.d.
A summary of this analysis for time periods t.sub.a, t.sub.b, t.sub.c and t.sub.d, is shown in Table A below:
TABLE A ______________________________________ t.sub.a t.sub.b t.sub.c t.sub.d ______________________________________ pixel 1-ON first value -1 1 -1 1 second value -1 -1 -1 -1 match yes no yes no mismatch no yes no yes 2-OFF first value -1 -1 1 1 second value 1 1 1 1 match no no yes yes mismatch yes yes no no no. of matches 1 0 2 1 no. of mismatches 1 2 0 1 difference 0 -2 2 0 column voltage 0 -V.sub.2 V.sub.2 0 ______________________________________
As is readily apparent, the column voltage Y.sub.a corresponds to the column voltage pattern and is applied to the column to place the first pixel in its ON state and the second pixel in its OFF state.
As for the other column voltage waveforms, Y.sub.b to Y.sub.d, the voltages are selected under the same criteria as described above and are summarized in Tables B, C and D hereinbelow:
TABLE B ______________________________________ t.sub.a t.sub.b t.sub.c t.sub.d ______________________________________ pixel 1-OFF first value -1 1 -1 1 second value 1 1 1 1 match no yes no yes mismatch yes no yes no 2-ON first value -1 -1 1 1 second value -1 -1 -1 -1 match yes yes no no mismatch no no yes yes no. of matches 1 2 0 1 no. of mismatches 1 0 2 1 difference 0 -2 2 0 column voltage 0 -V.sub.2 V.sub.2 0 ______________________________________ Column Voltage Applied = Y.sub.b
TABLE C ______________________________________ t.sub.a t.sub.b t.sub.c t.sub.d ______________________________________ pixel 1-ON first value -1 1 -1 1 second value -1 -1 -1 -1 match yes no yes no mismatch no yes no yes 2-OFF first value -1 -1 1 1 second value -1 -1 -1 -1 match yes yes no no mismatch no no yes yes no. of matches 2 1 1 0 no. of mismatches 0 1 1 2 difference 2 0 0 -2 column voltage V.sub.2 0 0 -V.sub.2 ______________________________________ Column Voltage Applied = Y.sub.c
TABLE D ______________________________________ t.sub.a t.sub.b t.sub.c t.sub.d ______________________________________ pixel 1-ON first value -1 1 -1 1 second value 1 1 1 1 match no yes no yes mismatch yes no yes no 2-OFF first value -1 -1 1 1 second value 1 1 1 1 match no no yes yes mismatch yes yes no no no. of matches 0 1 1 2 no. of mismatches 2 1 1 0 difference -2 0 0 2 column voltage -V.sub.2 0 0 V.sub.2 ______________________________________ Column Voltage Applied = Y.sub.d
In the examples above, the first value is 1 when the row-select voltage has a positive polarity or the first value when the row-select voltage has a negative polarity. Additionally, the second value is -1 when the display state of the pixel is ON, or 1 when the display state is OFF. The column voltage waveforms were selected by means of the difference between the number of matches and the number of mismatches. As will be appreciated by one of ordinary skill in the art, the sign conventions may be inverted. Moreover, it also is possible to set the column voltage waveforms with only the number of matches or the number of mismatches, without having to calculate the difference between the number of matches and the number of mismatches as explained below.
FIGS. 25A-25E illustrate another example of the prior art in which a plurality of row electrodes are divided into groups of row electrodes. The groups of row electrodes are selected in sequence and the row electrodes within each group are simultaneously selected. In this example, each group comprises three row electrodes that are simultaneously selected in order to generate a display pattern, as shown in FIG. 26.
In other words, initially three row electrodes, X.sub.1, X.sub.2 and X.sub.3, are selected and row selection voltages such as those shown in FIG. 25A are applied to these row electrodes, X.sub.1, X.sub.2 and X.sub.3, respectively. At the same time, the designated column voltages, to be discussed later, are applied to each column electrode Y.sub.1 to Y.sub.m. Next, row electrodes X.sub.4, X.sub.5 and X.sub.6, shown in FIG. 26, are selected and row selection voltages such as that in FIG. 25B are applied to these electrodes in the same manner as described above. At the same time, column voltages are applied to each column electrode, Y.sub.1 to Y.sub.m. As with the previous example, one frame period F is defined as the selection of all of the row electrodes, X.sub.1 to X.sub.n. One image is completely displayed in one frame period, and plural images can be display by repeating this cycle continuously.
When each row voltage waveform described above has h as the number of row electrodes that are simultaneously selected, as in previous example, the number of 2.sup.h row-select pattern are used. In this example, the number of 2.sup.3 or 8 patterns are used.
Moreover, as in the previous example, the column voltages applied to each column electrode, Y.sub.1 to Y.sub.m, are the same as the number of row-select patterns. Also, the voltage level of each pulse is such that the voltage that corresponds to the numbers of the ON state and the OFF state of the selected row electrodes is applied. In other words, the column voltage level is determined by comparing the row-select pattern and display pattern. Thus, for example, when the row voltage waveforms applied to row electrodes X.sub.1, X.sub.2 and X.sub.3, which are selected simultaneously in this example, have a positive pulse, they are ON, and when they have a negative pulse, they are OFF. The ON and the OFF of the display data are compared at each pulse and the column voltage waveforms are set according to the number of mismatches.
In other words, in the example of FIGS. 25A-25D, when the number of mismatches is zero, -V.sub.3 volts are applied; when it is 1, -V.sub.2 volts are applied; when it is 2, V.sub.2 volts are applied; and when it is 3, V.sub.3 volts are applied. The voltage ratios for V.sub.2 and V.sub.3 above are preferably such that V.sub.2 :V.sub.3 =1:3
In specific terms, in the case of the voltage waveforms applied to row electrodes X.sub.1, X.sub.2 and X.sub.3 in FIG. 25A, those waveforms are ON when the V.sub.1 volts are applied and OFF when the -V.sub.1 volts are applied. Referring to FIG. 26, the pixel is indicated as ON when there is a closed circle and OFF when there is a open circle. As shown in FIG. 26, the display states of the pixels that cross with column electrode Y.sub.1 and row electrodes X.sub.1, X.sub.2 and X.sub.3 are ON, ON and OFF, respectively. In contrast to this, the initial pulse pattern of the voltage applied to each row electrode, X.sub.1, X.sub.2 and X.sub.3, is OFF, OFF and OFF, respectively. Comparing both in sequence, the number of mismatches is 2. Therefore, V.sub.2 volts are applied to the initial pulse pattern of the voltage applied to each row electrode Y.sub.1, as shown in FIG. 25C. Using a similar analysis, the second pulse pattern of the voltage that is applied to each row electrode, X.sub.1, X.sub.2 and X.sub.3, is OFF, OFF and ON, respectively. When compared in sequence the voltage pattern with the ON, ON and OFF sequence of the aforesaid pixel display pattern, all are mismatching. Since the number of mismatches is 3, voltage V.sub.3 is applied to the second pulse of column electrode Y.sub.1. As will be understood by one of ordinary skill in the art, by applying the above described analysis to the third and fourth time intervals, column voltages -V.sub.2 and -V.sub.2 are applied therein. Thus, a column voltage of -V.sub.3, V.sub.2, -V.sub.2 and -V.sub.2 is applied to provide the pixel states as shown in FIG. 26.
In the next time period, the next three row electrodes X.sub.4 to X.sub.6, are selected by applying selection voltages thereto, as shown in FIG. 25B. In accordance with the analysis described above, column voltages have the voltage levels that corresponds to the number of mismatches between the ON and OFF display states of the pixels formed at the intersection of the row electrodes X.sub.4 to X.sub.6 and the column electrode, and the ON and OFF states of pulse patterns of the synthesized voltages. FIG. 25D illustrates the resultant voltage waveforms that are applied to the pixels at the intersection of the row electrode X.sub.1 and column electrode Y.sub.1. That is, the synthesized waveform is resultant of the voltage waveform applied to row electrode X.sub.1 and the voltage waveform applied to column electrode Y.sub.1.
As indicated above, the method that simultaneously selects a plurality of row electrodes in a group and the selection of each group in sequence, has the advantage of the reducing the drive voltage level.
Referring now to FIGS. 27A-27C, the relationship between the transmissitivity of a pixel of a liquid crystal display and the applied voltage is shown therein. In a liquid crystal display driven in a conventional manner, after the selection voltage has been applied to a particular pixel, during the period until the next selection voltage is applied to that pixel, the brightness gradually decreases during the time t. This reduces the transmissitivity T in the ON condition and, on the other hand, slightly increase the transmissitivity T in the OFF condition. As shown in FIG. 21, such conventional displays have poor contrast between the ON condition and the OFF condition.
The following is a general discussion regarding the conventional method for simultaneously selecting multiple row electrodes.
A. Requirements
(1) The N number of row electrodes to be displayed are divided up into N/h non-intersecting subgroups. PA1 (2) Each subgroup has h number of address lines. PA1 (3) At a particular time, the display data on each column electrode is composed of an h-bit words, e.g.: EQU d.sub.k*h+1, d.sub.k*h+2 . . . d.sub.k*h+h ; d.sub.k*h+j =0 or 1 PA1 d.sub.1, d.sub.2 . . . d.sub.h . . . Subgroup 0 PA1 d.sub.h+1, d.sub.h+2 . . . d.sub.h+h . . . Subgroup 1 PA1 d.sub.N-h+1, d.sub.N-h+2 . . . d.sub.N-h+h . . . Subgroup N/h-1 PA1 (4) The row-select pattern has 2.sup.h cycle and is represented by an h-bit words, e.g.: EQU a.sub.k*h+1, a.sub.k*h+2 . . . a.sub.k*h+h ; a.sub.k*h+j =0 or 1 PA1 (1) One subgroup is selected simultaneously for addressing. PA1 (2) One h-bit word is selected as the row-select pattern. PA1 (3) The row-select voltages are: PA1 (4) The row-select patterns and the display data patterns in the selected subgroup are compared bit by bit such as with digital comparators, viz. exclusive OR logic gates. PA1 (5) The number of mismatches i between these two patterns is determined by counting the number of exclusive-OR logic gates having a logical 1 output. PA1 (7) The column voltages for each column in the matrix is determined independently by repeating the steps (4)-(6). PA1 (8) Both the row voltage and column voltage are applied simultaneously to the matrix display for a time duration .DELTA.t, where .DELTA.t is minimum pulse width. PA1 (9) A new row-select pattern is chosen and the column voltages are determined using steps (4)-(6). The new row and column voltages are applied to the display for an equal duration of time at the end of .DELTA.t. PA1 (10) A frame or cycle is completed when all of the subgroups (=N/h) are selected with all the 2.sup.h row-select patterns once. EQU 1 cycle=.DELTA.t.multidot.2.sup.h .multidot.N/h PA1 Where, if V.sub.row =.+-.V.sub.r and V.sub.column =V(i), then V.sub.pixel =.+-.V.sub.r -V(i) or -V.sub.r -V(i). PA1 If V.sub.row =.+-.V.sub.r and V.sub.column =.+-.V(i), then V.sub.pixel =V.sub.r -V(i),V.sub.r +V(i), -V.sub.r -V(i) or -V.sub.r +V(i). PA1 Where: h.ltoreq.i+1 PA1 V.sub.r /V.sub.o =N.sup.1/2 /h . . . row selection voltage PA1 V.sub.(i) /V.sub.0 =(h-2i)/h={1-(2i/h)} . . . column voltage, and PA1 R=(V.sub.on /V.sub.off).sub.max ={(N.sup.1/2 +1)/(N.sup.1/2 -1)}.sup.1/2
Where 0.ltoreq.k.ltoreq.(N/h)-1 (k: subgroup)
In other words, one column of display data is:
B. Guidelines
-V.sub.r for a logic 0, PA2 +V.sub.r for a logic 1, PA2 0 volts or ground for the nonselected period.
Steps 1-4 are summarized by the following equation: ##EQU1## (where .sub..sym. is an exclusive OR logic operation) (6) The column voltage is chosen to be V(i) when the number of mismatches is i.
C. Analysis
The row select patterns in a case in which there are i number of mismatches will now be considered. The number of h-bit row-select patterns which differ from and h-bit display data pattern by i bits is given by EQU hCi=h|/{i|(h-i)|}=Ci
For example, when the case for h=3 and row electrode selection pattern=(0,0,0) is considered, the results would be as shown in the table below:
______________________________________ Mismatching number :Display Data pattern :Ci ______________________________________ i = 0 :(0,0,0) :1 way i = 1 :(0,0,1) (0,1,0) (1,0,0) :3 ways i = 2 :(1,1,0) (1,0,1) (0,1,1) :3 ways i = 3 :(1,1,1,) :1 way ______________________________________
These are determined by the number of bits of a word, not the row electrode selection patterns.
If the amplitude V.sub.pixel of the instantaneous voltage that is applied to the pixel had a row voltage of V.sub.row and column voltage of V.sub.column, the synthesized voltage would be as follows: EQU V.sub.pixel =(V.sub.column -V.sub.row) or (V.sub.row -V.sub.column)
That is: EQU V.sub.pixel =.vertline.V.sub.r -V(i).vertline. or .vertline.V.sub.r +V(i).vertline.
As a consequence, the specific amplitude to be applied to the pixel is either -(V.sub.r +V(i)) or (V.sub.r -V(i)) in the selection row and is V(i) in the non-selection row.
In general, in order to achieve a high selection ratio, it is desirable that the voltage across a pixel should be as high as possible for an ON pixel and as low as possible for an OFF pixel.
As a result, when a pixel is in the ON state, the voltage .vertline.V.sub.r +V(i).vertline. is favorable for the ON pixel, and the voltage .vertline.V.sub.r -V(i).vertline. is unfavorable for the ON pixel. On the other hand, when a pixel is in the OFF state, the voltage .vertline.V.sub.r -V(i).vertline. is favorable for the OFF pixel, and the voltage .vertline.V.sub.r +V(i).vertline. is unfavorable for the OFF pixel.
Here, it is favorable for the ON pixel to increase the effective voltage and unfavorable for the ON pixel to decrease the effective voltage. The number of combinations that selects i units from among the h bits is: EQU Ci=hCi={h|}/{i|(h-i)|}
The total number of mismatches provides the number of unfavorable voltages in the selected rows in a column. The total number of mismatches is i.multidot.Ci in Ci row select patterns considered are equally distributed over the h pixels in the selected rows. Hence the number of unfavorable voltages per pixel (Bi) when number of mismatches is i can be obtained as given following; EQU Bi=i.multidot.Ci/h(units/pixel)
The number of times a pixel gets a favorable voltage during the Ci time intervals considered is: EQU Ai={(h-i)/h}.Ci
In addition: EQU {(h-i)/h}.multidot.Ci+(i/h).multidot.Ci=(h/h)Ci=Ci
Accordingly, the following is obtained: EQU Ai=Ci-Bi={(h-1)|}/{i|.multidot.(h-i-1)|}
To summarize the above: ##EQU2##
In addition:
As noted above and as shown in FIGS. 27A-27C, however, a liquid crystal display driven according to such a method has poor contrast between its ON and OFF states.
Moreover, as shown in FIG. 25, in such conventional driving methods, the pulse width applied to the row electrodes and the column electrodes narrows as the number of simultaneously selected row electrodes increases, and this increases the amount of crosstalk due to the distortion of the waveforms. This results in, for example, poor image quality. This problem becomes even more serious, for example, in a case in which gray shade display, which is caused by the pulse width modulation (PWM), takes place.